A power factor corrector (PFC) extended from a previously proposed boost-type structure with power semiconductor filter (PSF) is proposed. The concept of the PSF is based on using a series pass device (SPD) to profile the input current and regulate the output voltage, and an input capacitor to circulate the ripple current generated by the boost converter. However, the input capacitor is charged up slowly with small input current around the zero-crossings, causing high voltage stress on the SPD. Then, a high voltage device for the SPD is needed. However, high voltage devices have large channel length modulation effect, high leakage current, large voltage drop, and slow response. To accelerate the capacitor charging and thus reduce the voltage stress, this project proposes to replace the output diode with a controllable switch. The converter is temporarily operated as a buck converter during the zero crossings with the input capacitor charged up swiftly by the output capacitor. The voltage across the SPD can be kept low over the line cycle, resulting in improved input current waveform and reduced power dissipation. A series pass module (SPM) constructed by multiple parallel connected low voltage devices is used to increase current rating. The devices are regulated to operate around the knee point of the output characteristics to reduce power loss. A 1kW, 85- 265Vac / 400Vdc prototype has been built and evaluated.